The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Many modern microprocessors can execute multiple instructions at once. The instructions typically access architectural registers to perform respective operations. The number of architectural registers, however, is generally limited. Accordingly, if multiple instructions need to write to the same architectural register, the processor may need to serialize the instructions, which can adversely affect the performance of the processor.
One way to solve this problem is to use register renaming, where each time an architectural register is written to, the architectural register is mapped to a different physical register with a different name. A table shows which architectural register references which physical register at a given time.